What else do you have there?
D3 is also /HOLDI removed a single 10k pulldown resistor that was connected along the trace connected to D3 and it seems to have fixed both the bootloop...
With Ozone you should be able to inspect what's written in the Flash, or if it's working at all. Look at 0x1000:0000 (XIP base), or 0x1c00:0000 (XIP_NOCACHE_NOALLOC_NOTRANSLATE_BASE).4.4 HOLD (/HOLD)
The /HOLD pin allows the device to be paused while it is actively selected. When /HOLD is brought low, while /CS is low, the DO pin will be at high impedance and signals on the DI and CLK pins will be ignored (don’t care). When /HOLD is brought high, device operation can resume. The /HOLD function can be useful when multiple devices are sharing the same SPI signals. The /HOLD pin is active low. When the QE bit of Status Register-2 is set for Quad I/O, the /HOLD pin function is not available since this pin is used for IO3. See Figure 1a-c for the pin configuration of Quad I/O operation.
Statistics: Posted by gmx — Sun Jun 15, 2025 2:53 am