That's the number of hardware system timer/counter, 1 for RP2040, 2 for RP2350but then what's the NUM_GENERIC_TIMERS?
(actually there are more timers but with different functionalities)
Each system timer/counter has 4 hardware alarms, those are 4 registers used to compare the lower 32-bit oft the counter, and eventually to generate an interrupt without needing to poll the timer.
The rest (like alarm pools) is done in software using one timer/counter running free and one alarm (usually the last one out of 4).
You can find more details in RP2350 datasheet:
12.8. System timers
12.8.1. Overview
The system timer peripheral on RP2350 provides a microsecond timebase for the system, and generates interrupts
based on this timebase. RP2350 has two instances of the system timer: TIMER0 and TIMER1. This allows for two
separately controlled timers, each in a different security domain. It supports the following features:
• A single 64-bit counter, incrementing once per microsecond
◦ Read from a pair of latching registers for race-free reads over a 32-bit bus
• Four alarms that match on the lower 32 bits of the counter and generate IRQ on match
The timer uses a one microsecond reference generated by the tick generators (see Section 8.5), and derived from the
reference clock (Figure 33), which itself is usually connected directly to the crystal oscillator (Section 8.2).
The 64-bit counter effectively cannot overflow (thousands of years at 1 MHz), so the system timer is completely
monotonic in practice.
12.8.1.1. Changes from RP2040
• RP2350 now has two timer instances: TIMER0 and TIMER1
• On RP2350, the tick source for each timer comes from the system-level tick generators (see Section 8.5)
• RP2350 added two new registers: LOCKED is used to disable write access to the timer, and SOURCE allows the timer to
count system clock cycles rather than a 1 μs tick
Statistics: Posted by gmx — Sun Nov 09, 2025 4:26 pm