Thanks I can see your point - but if bit 13 determines the way, isn't that the same as saying bit 13 is part of the set index, and not of the tag (and effectively meaning the cache is 1-way associative)?This is correct - it's described as an ability to select the way because when pinning at an arbitrary address (eg for cache-as-sram), you can choose bit 13 of the address to correspond to a specific cache way. But when pinning an actual address in flash, you can only pin it to the way corresponding to it's bit 13.From a strict interpretation it seems that this means that bit 13 of the address to pin effectively also determines the way (e.g. bit 13 = 0 addresses can only go in way 0 etc.) but then why even describe it as an ability to select the way?
Also, doesn't it contradict this sentence "Cache eviction policy is random, and the cache only makes one attempt to select an eviction way. If the cache selects to evict a pinned line, the eviction fails, and the access is demoted to an uncached access. As a result, a cache with one
way pinned does not behave exactly the same as a direct-mapped 8 kB cache, but average-case performance is similar.". Because if bit 13 of the address already determines the way, there's shouldn't be any randomness to it - that address can only go into one way (and if that is pinned, demoted into uncached access).
Or upon further thinking: Perhaps the cache is 2-way and behaves as one would expect (and eviction random as described), but it is only with respect to the pinning request there's this restriction of bit 13 = way, essentially an "API limitation" and not a reflection of how the cache is organized.
Statistics: Posted by martinxx — Tue Oct 14, 2025 10:51 am