Your plot appears to show pin 54 (QSPI_IOVDD) not connected to anything. Maybe you've got a flood fill turned off when you did the plot that fixes this, but if the board really has this pin open-circuit then it's not surprising it doesn't work. Fortunately an easy fix (just blob it to pin 53 which you have connected correctly).
Other comments:
This appears to be a 4-layer board with the internal planes being 3V3 (top) and GND (lower) - though it's possible your plots are misleading in this respect. If they are like that, there's two minor issue. The datasheet recommends a cut-out in the plane closest to the top side, below the track leading from pin 48 to the inductor (and under that pad of the inductor) - this is the PSU switching node and wants to have stray capacitance minimised. Conversely, over under the crystal you have a cut-out in the plane underneath the crystal - so the XIN track will see a change in impedance as it crosses the edge of the plane. Probably neither of these is bad enough to have any effect, but best avoided.
You seem to have vias in pads in various places. Unless you are paying for an expensive process with filled/plated vias, this will give you manufacturability issues. There looks to be plenty of space to move them to avoid this.
However, if you are just measuring it with a multimeter then the regulator is probably unstable and your measurement doesn't mean much.
Other comments:
This appears to be a 4-layer board with the internal planes being 3V3 (top) and GND (lower) - though it's possible your plots are misleading in this respect. If they are like that, there's two minor issue. The datasheet recommends a cut-out in the plane closest to the top side, below the track leading from pin 48 to the inductor (and under that pad of the inductor) - this is the PSU switching node and wants to have stray capacitance minimised. Conversely, over under the crystal you have a cut-out in the plane underneath the crystal - so the XIN track will see a change in impedance as it crosses the edge of the plane. Probably neither of these is bad enough to have any effect, but best avoided.
You seem to have vias in pads in various places. Unless you are paying for an expensive process with filled/plated vias, this will give you manufacturability issues. There looks to be plenty of space to move them to avoid this.
How are you measuring this? If you see a stable 1.1V while reset but it goes up to another stable but higher voltage when running, I I'd be looking for a short between 1V1 and an I/O pin - so at reset the pins are floating and the regulator works as advertised, when the pin is enabled it tries to pull it up to 3V3.Holding the RUN button brings the regulator down to 1.1V. Letting go it briefly goes to 1.2V and then back up to 1.4V...
However, if you are just measuring it with a multimeter then the regulator is probably unstable and your measurement doesn't mean much.
Statistics: Posted by arg001 — Sun Aug 03, 2025 5:21 pm