Hi
>> I also used a calibrated INA226
"CALIBRATED" yep I programmed the wrong sense resistor value. so I have 18.5 mA at 150Mhz, of interest, with run pin in reset (low), 280uA and "on chip" regulator working at 1.1volt.
>> SMI interface & RP2350 debug trace at 4bit x 75 MHz DDR (that's 75 MB/s).
YES, SMI looks good and address lines, thanks. Can the debugger transfer, move a block of memory to a Pi4B, ie. can it be tricked into transfer blocks of memory?? this is not SWD is it, or maybe HSTX, sounds interesting.
>> This is from my logic analyzer (FPGA-1Gsps)
I've worked out 2 possible ways to get the PICO to sample at 1Gsps. 1st is interesting/complicated 2nd is simple but both entail overclocking and testing ect.
I do have a PIO question, can PIO 1 use a trigger pin (wait pin) assigned in PIO 0??
anyway, thanks for your very informative links, very helpful.
thanks Brian
>> I also used a calibrated INA226
"CALIBRATED" yep I programmed the wrong sense resistor value. so I have 18.5 mA at 150Mhz, of interest, with run pin in reset (low), 280uA and "on chip" regulator working at 1.1volt.
>> SMI interface & RP2350 debug trace at 4bit x 75 MHz DDR (that's 75 MB/s).
YES, SMI looks good and address lines, thanks. Can the debugger transfer, move a block of memory to a Pi4B, ie. can it be tricked into transfer blocks of memory?? this is not SWD is it, or maybe HSTX, sounds interesting.
>> This is from my logic analyzer (FPGA-1Gsps)
I've worked out 2 possible ways to get the PICO to sample at 1Gsps. 1st is interesting/complicated 2nd is simple but both entail overclocking and testing ect.
I do have a PIO question, can PIO 1 use a trigger pin (wait pin) assigned in PIO 0??
anyway, thanks for your very informative links, very helpful.
thanks Brian
Statistics: Posted by brianWS — Fri Jun 27, 2025 9:18 am