General • Re: any existing high-speed pico-to-pico bus?

I was thinking about using a second pico as a "video card" for a "cpu" pico (similar to the NES setup of 6502 + PPU).

I have been thinking about that too; how to have one Pico updating a frame buffer, passing it to another for output.

The only implementation I have seen which uses a separate RP2040 for video output is the Pimoroni PicoVision and that uses a pair of 8MB PSRAM chips to pass frame buffers.

Has anyone put together an 8-line parallel bus between two picos?

I don't know but should be easy enough to try but it could be a case of premature optimisation or trying to pick a solution before knowing what is needed, and that will come down to how large the frame buffer to transfer is and its frame depth.

The first question to ask yourself is why you are wanting it, whether it gives any significant advantage over a single-chip solution.

Presuming there are reasons to do it; how much you need to transfer will determine what's needed to do it. A small transfer size can be implemented using single lane SPI or even UART-style serial, perhaps using '32N1' rather than the more traditional '8N1'. Adding additional data lanes allows more to be passed in parallel, increases throughput.

Transferring a 640 x 480 8-bit colour frame buffer delivering 20fps (50Hz) requires approximately 50mbps transfer speeds using a single lane - width * height * depth * fps = bps

You can determine what you need and then how it needs to be implemented to achieve that.

Having eight lanes might make the above more feasible but, given a single RP2040 can output that itself, one has to consider if the gain of a two chip solution is worth the increased complexity and cost.

And an RP2040 doesn't have enough RAM for a 640 * 480 8-bit frame buffer anyway.

Which is probably why the Pimoroni PicoVision is how it is. External RAM allows a larger frame buffer with more colours. You need external RAM on both sides so, as swapping RAM from side to side eliminates transfer time, that's a no-brainer. I am not sure how they keep RAM content in each in sync with each other.

Having a high-speed on-chip inter-chip link is on my wish list but we will have to wait to see what the forthcoming RP235X offers in that respect.

Statistics: Posted by hippy — Mon Jul 08, 2024 11:30 am

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